Semiconductor Engineering12h
Chip Companies Play Bigger Role In Shaping University Curricula
Design and AI companies are using a range of tools to help graduates become productive more quickly. Some are feeding their ...
Semiconductor Engineering20h
Chiplet-Based NPUs to Accelerate Vehicular AI Perception Workloads
A new technical paper titled “Performance Implications of Multi-Chiplet Neural Processing Units on Autonomous Driving ...
Semiconductor Engineering20h
Research Bits: Dec. 3
Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling ...
Semiconductor Engineering4d
Chip Industry Week In Review
Intel CEO Pat Gelsinger retired on Dec. 1, according to the company. He will be replaced by two interim co-CEOs, David Zinsner, who also continues to serve as CFO and Michelle Johnston Holthaus, who ...
Semiconductor Engineering5d
STCO for Dense Edge Architectures using 3D Integration and NVM (imec,, et al.)
Technology Co-Optimization for Dense Edge Architectures using 3D Integration and Non-Volatile Memory” was published by ...
Semiconductor Engineering6d
Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)
Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions” was ...
Semiconductor Engineering6d
Pooling CPU Memory for LLM Inference With Lower Latency and Higher Throughput (UC Berkeley)
Pooling CPU Memory for LLM Inference” was published by researchers at UC Berkeley. Abstract “The rapid growth of LLMs has ...
Semiconductor Engineering6d
Aging, Complexity, And AI In Analog Design
Where digital and analog designs are overlapping, and why it's becoming more difficult to ensure they work as expected over ...
Semiconductor Engineering6d
Monitor Etch Defects on Dies in the Outer Regions Of The Wafer Using ISR
A technical paper titled “Detection of defective chips from nanostructures with a high-aspect ratio using hyperspectral ...